1. Field of the Invention
The present invention relates to a radio receiver which receives reception waves that are modulated with frames each being a sequence of a plurality of slots and restores transmission information that is distributed to the slots.
2. Description of the Related Art
The CDMA (code division multiple access) is a multiple access scheme that is superior in confidentiality and interference-resistibility and enables suppression of co-channel interference and effective use of radio frequencies.
With an additional advantage of enabling flexible setting of a radio transmission-characteristic for each sector cell with the aid of a technique of realizing, with high accuracy at high speed, transmission power control that is necessary to solve the near-far problem, the CDMA is applied to many mobile communication systems.
FIG. 7 shows the configuration of an exemplary radio receiver that is provided in a radio base station of a mobile communication system to which the CDMA is applied.
As shown in FIG. 7, the feeding point of an antenna 51 is connected to the input of a quadrature demodulator 53 via a bandpass filter (BPF) 52 and the output of a local oscillator 54 is connected to the local frequency input of the quadrature demodulator 53. One output of the quadrature demodulator 53 is connected to the writing port of a memory 57i via a cascade-connected low-pass filter (LPF) 55i and A/D converter (A/D) 56i, and the other output of the quadrature demodulator 53 is connected to the writing port of a memory 57q via a cascade-connected low-pass filter (LPF) 55q and A/D converter (A/D) 56q. The reading ports of the memories 57i and 57q are connected to a searcher 58 and corresponding inputs of a plurality of finger parts 59-1 to 59-N. The first to third inputs of each of the finger parts 59-1 to 59-N are connected to corresponding inputs of respective maximal-ratio combining parts 60S, 60T, and 60D. The maximal-ratio combining part 60S outputs a string of PILOT bits, FBI bits, and TPC bits (described later). The output of the maximal-ratio combining part 60T is connected to the control input of an error correcting part 62 via a TFCI inferring part 61. The output of the maximal-ratio combining part 60D is connected to a corresponding input of the error correcting part 62 and the input of a sync control part 63. The error correcting part 62 and the sync control part 63 output a sequence of data (described later) and a sync signal, respectively.
The finger part 59-1 is composed of the following components:                Despreaders 67i-1 and 67q-1 cascaded to the respective memories 57i and 57q and supplied with despreading codes from the searcher 58.        Pilot averaging parts 68S-1, 68T-1, and 68D-1 each having two inputs that are connected to the outputs of the despreaders 67i-1 and 67q-1, respectively.        Sync detecting parts 69S-1, 69T-1, and 69D-1 each of which has first to fourth inputs connected to the outputs of the despreaders 67i-1 and 67q-1 and the two outputs of the associated one of the pilot averaging parts 68S-1, 68T-1, and 68D-1 and whose outputs are connected to corresponding inputs of the maximal-ratio combining parts 60S, 60T, and 60D, respectively.        
The finger parts 59-2 to 59-N are configured in the same manner as the finger part 59-1 is, and hence are not be described here. The components of the finger parts 59-2 to 59-N are given the same symbols as the corresponding components of the finger part 59-1 except that suffixes “2” to “N” are used in place of “1.”
Further, in the following description, for items common to the finger parts 59-1 to 59-N, a suffix “C” meaning that it can be any of “1” to “N” will be used instead of the suffixes “1” to “N” for the sake of simplicity.
In the radio receiver having the above configuration, the bandpass filter 52 extracts a desired reception wave component from a radio-frequency signal arriving at the antenna 51. The quadrature demodulator 53 generates two orthogonal baseband signals I and Q by performing quasi-synchronous detection on the reception wave component based on a local frequency signal that is generated by the local oscillator 54 and has the same frequency as the nominal value of the reception wave component in prescribed accuracy.
The A/D converters 56i and 56q generate orthogonal discrete signals Id and Qd by oversampling the baseband signals I and Q in parallel by cooperating with the respective low-pass filters 55i and 55q. 
The memories 57i and 57q temporarily store the discrete signals Id and Qd in time-series order.
The searcher 58 performs the following processing parallel with processing of calculating correlations between the above-mentioned despreading codes and the discrete signals Id and Qd stored in the memories 57i and 57q over a period that is plural times the cycle of the despreading codes and calculating and storing a delay profile as a sequence of average values of the correlations over the cycle of the despreading codes:                Refers to the delay profile at intervals of the cycle of the despreading codes and assigns an available one of the finger parts 59-1 to 59-N to each time point when the value of the delay profile exceeds a prescribed threshold. Alternatively, resets the finger parts 59-1 to 59-N every time a delay profile is generated.        Gives orthogonal, two kinds of despreading codes that are in synchronism with above-mentioned time points to the two respective despreading parts (denoted by symbol “67”) of finger parts that are assigned in the above-described manner.        
In the finger part 59-C, the despreaders 67i-C and 67q-C generate despread signals i-C and q-C corresponding to the respective baseband signals I and Q by multiplying the discrete signals Id and Qd by the two kinds of despreading codes that are supplied from the searcher 58.
Incidentally, as shown in FIG. 8, the despread signal i-C is a sequence of frames (a channel that is formed as a sequence of such frames will be hereinafter referred to as “DPDCH”) each consisting of 15 slots that are arranged continuously in time-series order and each of which consists of a single field that has a constant word length Ndata and is to accommodate data to be transmitted.
For example, as shown in FIG. 8, the despread signal q-C is a sequence of frames (a channel that is formed as a sequence of such frames will be hereinafter referred to as “DPCCH”) each consisting of 15 slots that are arranged continuously in time-series order and each of which consists of four fields to accommodate the following four respective kinds of bits:                PILOT bits that are given as a known bit string having a word length Npilot of 3–8 bits and are used for slot-by-slot synchronization.        TFCI (transport format combination indicator) bits that are unique bits or a bit string that has a word length NTFCI of 0–4 bits, belongs to a code sequence having a steep autocorrelation characteristic and a gentle and small cross-correlation characteristic, and indicates a format of the slot to which the TFCI bits belong.        FBI (feedback indicator) bits that have a word length NFBI of 0–2 bits and are used for transmission diversity.        TPC (transmission power control) bits that have a word length of 1 or 2 bits and are used for the above-mentioned transmission power control.        
Combinations of the numbers of bits that the above four bit strings can have are shown in the bottom part of FIG. 8. However, they are not described here because they do not directly relate to the invention.
Cooperating with the searcher 58, the pilot averaging parts 68S-C, 68T-C, and 68D-C perform channel inference by, for example, calculating, in parallel, according to the WMSA (weighted multi-slot averaging) scheme, averages (hereinafter referred to as “average vectors”; see FIG. 9B) of vectors q1, q2, . . . (see FIG. 9A) each of which represents, in the signal space, despread signals i-C and q-C in the period of a field that should accommodate PILOT bits (described above) among the fields of each slot.
Cooperating with the searcher 58, the sync detecting part 69S-C sequentially outputs, one by one, the sum (hereinafter referred to as “first demodulation signal”) S-C of a despread signal q-CS that corresponds to the difference between the sum (hereinafter referred to as “vector sum S”) of vectors representing, in the signal space, the despread signal q-CS in the periods of fields to accommodate FBI bits and TPC bits (described above) among the fields of each slot belonging to a DPCCH and the average vector calculated by the pilot averaging part 68S-C.
Cooperating with the searcher 58, the sync detecting part 69T-C sequentially outputs, one by one, the sum (hereinafter referred to as “second demodulation signal”) T-C of a despread signal q-CT that corresponds to the difference between the sum (hereinafter referred to as “vector sum T”) of vectors representing, in the signal space, the despread signal q-CT in the period of a field to accommodate TFCI bits (described above) among the fields of each slot belonging to the DPCCH and the average vector calculated by the pilot averaging part 68T-C.
Cooperating with the searcher 58, the sync detecting part 69D-C sequentially outputs, one by one, the sum (hereinafter referred to as “third demodulation signal”) D-C of a despread signal i-CD that corresponds to the difference between the sum (hereinafter referred to as “vector sum D”) of vectors representing, in the signal space, the despread signal i-CD in the period of a single field to accommodate data (described above) among the fields of each slot belonging to a DPDCH and the average vector calculated by the pilot averaging part 68D-C.
The maximal-ratio combining part 60S maximal-ratio-combines the first demodulation signals S-1 to S-N that are output parallel from the sync detecting parts 69S-1 to 69S-N that are provided in the respective finger parts 59-1 to 59-N, and thereby generates a demodulation signal SRAKE that indicates values of fields to accommodate PILOT bits, FBI bits, and TPC bits and is to become a subject of decision decoding on these PILOT bits, FBI bits, and TPC bits.
The maximal-ratio combining part 60T maximal-ratio-combines the second demodulation signals T-1 to T-N that are output parallel from the sync detecting parts 69T-1 to 69T-N that are provided in the respective finger parts 59-1 to 59-N, and thereby outputs a demodulation signal TRAKE that indicates values of fields to accommodate TFCI bits (may include bit errors due to transmission errors).
The TFCI inferring part 61 infers, based on an autocorrelation characteristic (mentioned above), a string of most probable TFCI bits (hereinafter referred to as “inferred TFCI pattern”) that is indicated by the demodulation signal TRAKE.
The maximal-ratio combining part 60D maximal-ratio-combines the third demodulation signals D-1 to D-N that are output parallel from the sync detecting parts 69D-1 to 69D-N that are provided in the respective finger parts 59-1 to 59-N, and thereby outputs a demodulation signal DRAKE that indicates data (described above; may include bit errors due to transmission channel errors).
The error correcting part 62 performs decoding processing (e.g., Viterbi decoding or turbo decoding) that complies with a prescribed channel coding scheme on the demodulation signal DRAKE, and thereby outputs a sequence of data in which bit errors that have occurred in the radio transmission channel are corrected.
Standard vectors that indicate a known frame sync pattern (FSW) in time-series order and indicate a sequence of regular symbol positions to be contained in the demodulation signal DRAKE according to a prescribed frame formation are given to the sync control part 63 in advance or when necessary according to a channel control procedure.
The sync control part 63 correlates the demodulation signal DRAKE with the standard vectors thus given and generates a sync signal indicating time points when the correlation result exceeds a prescribed threshold and has a local maximum.
Therefore, the demodulation and decoding of reception waves are performed with high reliability under the channel inference that is performed in such a manner that fields accommodating known PILOT bits that are included in each slot are used as references.
Incidentally, in the above conventional example, the channel inference is performed based on only PILOT bits and a signal indicating fields accommodating PILOT bits among the fields of a plurality of slots in the signal space is integrated in the channel inference process.
Therefore, the configuration of the conventional example has limitations not only in the adaptability to systems according to the provisions of the 3GPP (Third Generation Partnership Project) but also in the capabilities of providing a variety of added values and improving the performance (following three points):                Since the length of fields to accommodate PILOT bits is not necessarily kept constant, there is a possibility that desired high response speed and high accuracy of the synchronous detection cannot be attained with high reliability in a stable manner.        During a compressed mode, the level of reception waves lowers. However, resulting deterioration in transmission quality is not necessarily considered sufficiently in determining the specifications of various systems. Therefore, sufficient margins in performance are not secured.        
However, particularly in the fields of mobile communication systems and wireless LANs in which the number of subscribers and the transmission capacity are expected to increase, advantages in price and performance as well as capability of future expansion are strongly required.
The above problems may be made less serious or solved through application of a prior art technique of realizing synchronous detection and elimination of interference by provisionally deciding data symbols that do not correspond to PILOT bits (see Japanese Patent Laid-Open No. 355849/1999, for example).
However, in practice, it is difficult in some cases to use such a prior art technique because it is complex in configuration in the following points and requires a large amount of processing:                The above-mentioned provisional decision can be made only after a string of TFCI bits is decoded and identified, despreading processing is performed based on a spreading factor SF suitable for the string of TFCI bits, and data obtained as a result of the despreading processing are detected synchronously.        Even after such provisional decision has been made, data (described above) should be detected again after being stored temporarily.        